Evolution
of Memories RAM |
Dynamic
memories RAM |
Volatile
memories and nonvolatile |
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Created it, 06/09/09
Update it, 06/09/27
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2. 3. - CHRONOGRAMS
To make function a memory, certain conditions should be met.
2. 3. 1. - READING IN MEMORY
For reading in a memory, it is
necessary to present the address of the data that one wants to read, put the
entry of read/write (R / 
)
at the active state (generally “1”) and
to select the case of the memory by applying to the entries of selection an
active level.
These conditions are described by the chronogram of figure 28.
In this chronogram and the following, the hatched parts indicate that the state of the entries concerned can vary.
The level of the exit given represented to semi way of state 1 and state 0 indicates that it is with the state “high impedance”.
The state “high impedance” corresponds if the output circuit is disconnected. This disconnection is carried out thanks to circuits “TRI-STATE” which will be examined in Practice Digitale 12.
It is noted that it takes a certain time called access time so that the data available at exit is validated after the entries of address, read/write and selection were activated.
When the entries of selection are activated, the data buses are not any more in the state “high impedance”, but do not give therefore the data corresponding to the desired address.
Indeed, the travel time of the state of the entries of address and read/write is larger than that of the entries of selection.
2. 3. 2. - WRITING IN MEMORY
To write in a memory, it is necessary to proceed in a way similar to that used during the reading.
First of all, one presents the address of the data which one wants to memorize, one subjects the entry of read / write at the active state (generally 0), one selects the case of the memory by activating the entries of selection and finally one applies to the data buses the value to be memorized during a time at least equal to the access time of the memory. These various operations are represented in the chronogram of figure 29.
2. 4. - EVOLUTION
OF MEMORIES RAM
In a static memory RAM, each bit of information is memorized in a rocker with transistors which requires at least two transistors. Actually, so that this rocker is addressable, the diagram of each cell memory becomes complicated a little and arises in the form indicated figure 30.
The transistors T3, T4, T5 and T6 form the rocker ; transistor T1 is used to select the memory to write a data there, whereas the T2 transistor is used to select the cell to read its contents.
They are thus not two but six transistors which are necessary to store a bit. The manufacturers then thought of reducing the number of transistors of a cell memory in order to be able to integrate a greater number of it on the same surface. They then imagined the RAM dynamic.
In those, information is not any more stored in the form of state of a rocker but is stored in a condenser.
2. 5. - DYNAMIC
MEMORIES RAM
The dynamic storages store information (or bits) in the form of electric charges applied to small integrated condensers. These condensers have capacities of about 50 femtofarads is 50 x 10-15 farads.
With a condenser charged the logical value 1 corresponds. With a discharged condenser the logical value 0 corresponds. Its load can be about 500 femtocoulombs, load corresponding to a tension of 10 volts on its terminals.
Although this value of load can seem low, it corresponds all the same to three million electrons and one can consider that a load thousand times less would still allow a reliable memorizing.
The diagram of a basic cell of dynamic RAM is summarized with that represented figure 31-a.
It consists of a transistor MOS and condenser of memorizing C which is actually stray capacity GRILL-SUBSTRAT of the transistor. Resistance R in series in the circuit drain is actually consisted a second transistor MOS whose grid and source are connected as shown in the figure 31-b.
A dynamic storage cell RAM thus requires actually two transistors, that is to say three times less than one static storage cell RAM. This simplicity makes it possible to reach levels of integretion rather high on restricted surfaces. At present, the majority of the manufacturers propose RAM dynamic of 256 kilobits. This reduction in the reduced number of transistors per cell memory of as much consumption and increases the speed, which constitutes two considerable advantages.
On the other hand, the major disadvantage of these memories is that if one gives up them after their loading, the condensers discharge in some thousandth from seconds and information is lost.
It is thus necessary to operate a cooling of the dynamic storages in a periodic way to preserve the data as a long time as the food is connected.
The cooling of the storage cells is carried out usually all one or two milliseconds, i.e. 500 or 1 000 times a second. It consists in reloading each condenser individually before he is not completely discharged. Obviously, the condensers which correspond to a logical value 0 and which are discharged at the beginning, should not be charged at the time of coolings.
This process requires a periodic signal which can be provided either by a generator of clock, or by the signal of reading itself provided that it is repeated regularly.
Thus, in the dynamic storages, there is always a door used to generate the internal signals of order necessary to the regeneration of the data.
Figure 32 gives the synoptic diagram of a dynamic storage of 64 bits.
Let us examine more closely, using figure 33, the principle of operation of the circuit of cooling.
Let us consider the cell memory selected by the line and the column corresponding to the selected address (in fat figure 33). The data forward by the connection corresponding to the selected column on which an amplifier of threshold is connected.
When it is a question of writing in the memory, the reversers 
,
and 
are in the position “a” and the data
arrives at the cell memory, charging the condenser if it is about one 1
logic and discharging it if it is one 0
logic.
When it is a question of reading the contents of the memory, the reversers ,
and
are in the position “b” and the load of
the condenser of the cell selected memory is applied to the entry of an
amplifier of threshold. According to the high level or low applied to its entry,
this amplifier rocks in a high or low state and thus delivers on the exit the
memorized bit.
At once after this reading, the
reverser
passes by again on the position “a” and
the high or low state of the exit of the amplifier is used to possibly reload
(in the case of the high state) the condenser of the cell memory.
At the time of a cycle of cooling, each cell is thus read and reloaded at once. To accelerate the process, an amplifier is connected to each column and all the columns are refreshed simultaneously : the operation of cooling of a complete memory thus consists in reading sequentially in one or two milliseconds all the lines of the memory.
2. 6. - SPEED OF THE MEMORIES
We saw previously that dynamic storages MOS were faster than the static storages carried out with same technology. Let us see what that means concretely.
A memory is regarded as more or less fast according to more or less long time's necessary to the reading of the contents of an address.
More precisely, this speed of the memory is a function of the access time and the cycle time of reading.
The access time is the time which passes between the moment when the memory receives a reading order and the moment when this one provides in exit the data contained to the address indicated.
Memories MOS have an access time of about 100 to 200 nanoseconds, on the other hand for the bipolar memories, this time is tiny room to a few tens of nanoseconds.
The cycle time of reading is equal to the access time, plus a certain time necessary to the memory to prepare to receive the following request.
Indeed, in the dynamic storages, when a data has been just read, it must be rewritten at once with the same address under penalty of being lost.
This procedure does not exist in the static storages which do not lose the contents of an address during the reading.
2. 7. - PSEUDO MEMORIES - STATICS
In spite of the advantages evoked previously (lower cost, less consumption, greater memory size), dynamic memories RAM nevertheless have the disadvantage of requiring signals of regeneration, which complicates the external control circuit.
To remove this defect, certain manufacturers thought of completely incorporating the circuits of cooling in the case of the memories. Thus, seen outside, these memories are completely similar to memories RAM statics : they do not comprise any more an entry for the clock signal and do not claim any more any precaution for use concerning regeneration.
For this reason, these memories are known as pseudo-statics. This type of case tends to be spread more and more, especially in the microprocessor-based systems. Many memories of strong capacity (from 8 kilooctets) baptized static by the manufacturers are actually of the memories of the pseudo-statics type.
2. 8. - VOLATILE MEMORIES AND NONVOLATILE
All the electronic memories described until now are volatile memories, i.e. they lose their contents as soon as the food is disconnected.
When this one is restored, the rockers constituting the static storages are put in an unspecified and unforeseeable state whereas the condensers of the dynamic storages are often discharged although parasitic impulses can sometimes charge them in a random way.
In certain cases, one needs to store the information contained in the memories even when the supply voltage disappears.
With memories RAM, the only solution is to use a small buffer battery which enters in service when the principal supply is cut off.
That is possible with memories CMOS which consume very little. In addition, the progress made in the capacity of the accumulators makes that low-size batteries are able now to feed during weeks of memories CMOS of 4 kilooctets.
The use of this type of battery is rather frequent in the portable apparatuses like in the industrial systems.
Indeed, in those, an inopportune interruption of the tension sector (of a few milliseconds or several hours, as it occurs some from time to time at the time of breakdowns) would cause without that an immediate loss of the data.
The cost of the recharging of the memories before restarting of the system is such as it is more profitable to associate a battery of safeguard on suspicion there.
Despite everything, this method does not solve all the problems and in many cases, one has need for memories containing of recorded information in a permanent way.
A simple example is that of the control programs of a pocket calculator which are stored in said permanent memories not birds.
Their contents are introduced once and for all during manufacture.
Contrary to the memories RAM which would allow the writing and the reading of information, these last are thus memories with reading alone from where them name of ROM (of English Read Only Memory = Mémoire with reading alone). These ROM memories will be examined in chapter 3.
2. 9. - COMPARISON OF VARIOUS MEMORIES RAM
| Type | Technology | Words of | Capacity in Kbits | Access time in ns | Consumption in mW | Remarks |
| Dynamic RAM | MOS N MOS | 1, 4, 8 bits | 16 to 256 | 100 to 350 | 30 to 40 | These memories must be refreshed every 3 ms to preserve their contents |
| Static RAM | MOS N MOS | 1, 4, 8 bits | 4 to 64 | 150 to 400 | 150 to 600 | Density lower than the RAM dynamic. Generally 2 transistors per cell |
| Static RAM | CMOS | 1, 4, 8 bits | 0,256 to 64 | 100 to 600 | 20 to 100 | Low fuel consumption. Can be returned not bird thanks to a pile |
| Static RAM | ECL | 1, 4, 8 bits | 0,256 to 4 | 10 to 45 | 400 to 1 000 | Weak access time but capacity (max. 4 Kbits) and high consumption |
| Static RAM | Bipolar TTL | 1 or 4 bits | 64 bits with 4 Kbits | 33 to 50 | 175 to 500 | Each cell is a bistable rocker |
2. 10. - EXAMPLE OF MEMORY RAM
The figure 35-a shows the stitching of a static memory RAM of type 4016 of Texas Instruments of 2K words of 1 byte. The figure 35-b shows its synoptic diagram.
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