Examination
of a circuit carrying out the sum of two numbers of 1 bit |
Summoner
of 1 Bit with Reserve |
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Created it, 06/10/19
Update it, 06/10/29
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In this practice, we will examine the following digital circuits : summoners, multiplexers and demultiplexers.
1. - RECALLS AND PREPARATION OF THE MATERIAL
1. 1. - RECALLS
The summoners are more or less complex circuits which carry out the addition of numbers expressed in binary code.
We will examine the half-adders, the complete summoners and we will analyze the method of nap in series and that of nap in parallel.
The multiplexers are electronic switches which make it possible to switch several lines towards only one, while the demultiplexers provide the opposite function.
We will see finally how a multiplexer can also be used to replace a network of doors.
Before beginning the examination of these circuits, it is useful to point out the rules which govern the sum of binary numbers of a bit. Those are summarized in the table of figure 1 where A and B are the terms of the sum, S the sum and C reserve.
While adding with the binary numbers, it is necessary to take account of reserve coming from the sum partial of the bits (figures) of lower row. Figure 2 represents the results with reserves of the sum of two bits.
In this table, A and B are the terms, Ci reserve coming from the preceding partial sum, S the sum and Ci + 1 reserve.
1. 2. - PREPARATION OF THE MATERIAL
MM 74C86
MM 74C08
MM 74C32
MM 74C00
MM 74C164
MM 74C165
MM 74C74
MM 74C02
MM 74C83
MM 74C151
MM 74C154
MM 74C163
You point out that one should separate the integrated circuits from their anti-static foam only before their immediate use and that they always should be given on their foam after use.
2. - FIRST EXPERIMENT : EXAMINATION
OF A CIRCUIT CARRYING
OUT THE SUM OF TWO NUMBERS OF 1 BIT
Figure 3 gives a simple chart of the circuit summoner which you will try out now.
The two binary numbers of 1 bit to be added are applied to the entries A and B and one obtains the sum of those at the exit S according to rules' of the binary sum deferred hereafter.
0 + 0 = 0 with reserve = 0
0 + 1 = 1 with reserve = 0
1 + 0 = 1 with reserve = 0
1 + 1 = 0 with reserve = 1
To provide this function, one of the doors OR Exclusive of the integrated circuit MM 74C86 will be used; its table of operation that you know is as follows :
2. 1. - REALIZATION OF THE CIRCUIT
a) Remove matrix and support ICX all the connections and components relating to the last experiment.
b) Insert on the matrix the integrated circuit MM 74C86 (4 doors OR Exclusive) and carry out the connections illustrated with the figure 4-a. The electric diagram of the circuit carried out is given to the figure 4-b. As you note it, only one door OR Exclusive is used. The entries are connected to switches SW0 and SW1, while the exit is connected to the LED L0.
Thus, to entries A and B of the circuit is applied a bottom grade (L) or high (H) according to whether corresponding switches SW0 and SW1 are commutated on position 0 or position 1.
The LED L0 indicates the level of the exit.
2. 2. - OPERATIONAL TESTS
a) Introduce the card into the catch sector.
b) Place SW0 and SW1 both on position 0 and energize Digilab.
Let us associate the bottom grade (L) the binary digit 0 is on the level the high (H) binary digit 1.
Thus, in this case, at the entries A and B present two binary numbers of 1 bit, each one of them being equal to 0.
Observe the LED L0 : it is extinct. That indicates that the exit S of OR Exclusive is on the bottom grade, therefore that the binary digit at exit is equal to 0.
The first rule of the binary sum 0 + 0 = 0 is thus confirmed.
c) now Put SW0 on position 0 and SW1 on position 1 : thus at entry A bit 0 is present and at the entry B bit 1.
So that the second rule of the binary sum 0 + 1 = 1 is checked, the exit of the summoner must indicate 1 like result, i.e. it must be at the high level ; for confirmation, observe L0, it must be lit.
d) Check, now, the third regulates 1 + 0 = 1 by positioning SW0 on 1 and SW1 out of 0.
In this case also, L0 must ignite.
e) Check finally the last rule 1 + 1 = 0 with reserve of 1 by positioning SW0 and SW1 both out of 1.
In this case, L0 must die out, nevertheless reserve is not indicated.
f) This experiment being finished, put Digilab not under tension.
In short, this handling enabled you to note that a simple door OR Exclusive can carry out the sum of two binary numbers of 1 bit.
It remains however to indicate reserve. Indeed, in the case of the sum 1 + 1, the circuit gives the exact sum which is well 0, but not the reserve which is worth 1.
It is thus necessary to add to the preceding circuit a circuit which carries out the calculation of reserve.
In the next experiment, you will cable a circuit which generates this reserve.
3. - SECOND EXPERIMENT : OPERATIONAL TESTS
OF A SUMMONER OF 1 BIT WITH RESERVE
In this experiment, you will carry out a summoner more complete than the preceding bus he indicates the value of reserve.
This summoner thus has two entries to which are applied the two numbers to add and of two exits: to indicate the result of the sum and the other to indicate reserve, as indicated in figure 5.
The exit which indicates reserve is located by the letter C which is initial English term CARRY.
3. 1. - REALIZATION OF THE CIRCUIT
Leave in place the assembly of the preceding experiment, insert on the matrix the integrated circuit MM 74C08 (quadruple AND) and carry out the new connections highlighted at the figure 6-a.
The electric diagram of the circuit carried out is given to the figure 6-b.
3. 2. - OPERATIONAL TESTS
a) Place SW0 and SW1 on position 0.
b) Put Digilab under tension. Under these conditions, one carries out the following sum :
0 + 0 = 0 with reserve = 0
Thus, L0 which indicates the sum and L1 which indicates reserve are extinct.
c) By positioning SW0 and SW1 suitably, check the following sums :
0 + 1 = 1 with reserve = 0
1 + 0 = 1 with reserve = 0
d) Place finally SW0 and SW1 on position 1 : L1 ignites.
Indeed, you have just checked the binary sum :
1 + 1 = 0 (L0 extinct) with reserve = 1 (L1 lit), which can be written in the form :
1 + 1 = 102
The same amount in decimal code becomes 1 + 1 = 2.
e) The experiment being finished, put not under tension Digilab. The examined circuit is called half-adder because it does not take account of reserve coming from a possible circuit preceding summoner.
In the following experiments, you will examine circuits which do not present this limitation and which are thus called complete summoners.
Moreover, you will carry out more complex circuits which make it possible to add with the numbers made up of several binary digits.
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