The
function OR with diodes |
The
function NOT |
Switching
functions with Diodes and Transistors DTL |
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Improvement
of the order |
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Created it, 06/03/17
Update it, 06/03/22
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2. - SWITCHING FUNCTIONS A DIODES
2. 1. - THE FUNCTION “AND” A DIODES
The figure 8-a represents the function AND with diodes.
The switch i1 puts the entry N° 1 at Ve1 = VCC, i.e. at the binary state 1.
The switch i2 puts the entry N° 2 at Ve2 = 0, i.e. at the binary state 0.
Exit VS, in this case, is on a level of tension equal to the polarization of the D2 diode in the busy direction, that is to say: 0,6 V.
This level 0,6 V will be regarded as absence of tension, that is to say the binary state 0.
Binary states:
Ve1 = 1
Ve2 = 0
VS = 0
The figure 8-b shows the same circuit, but the switch i1 changed position, it puts from now on the N°1 entry at Ve1 = 0 V, that is to say the binary state 0.
The entry N° 2 did not change a level. Exit VS sees the direct tension of the D1 diodes and D2 in parallel, i.e. 0,6 V, are the binary state 0.
Binary states :
Ve1 = 0
Ve2 = 0
VS = 0
On the figure 8-c, the two switches carry entries 1 and 2 on the level of tension + VCC. None the diodes can lead, tension VS, in the absence of circulation of current in R, passes to + VCC.
Binary states :
Ve1 = 1
Ve2 = 1
VS = 1
In this type of assembly, it is necessary that the entry N° 1 is in a binary state 1 (presence of tension) AND that the entry N° 2 is in a binary state 1, so that exit VS takes the binary state 1.
In all the other cases, exit VS takes state 0. One can draw up a table, which you know already and who summarizes the various states of VS according to the Ve entries and that one calls : the table of Karnaugh.
Figure 9 represents the table of the switching function AND.
On this figure are represented, in top, the binary states of Ve1, on the left, the binary values of Ve2.
Inside the boxes, the various binary states of VS.
The truth table is another way of representing the behavior of a circuit. It is illustrated of figure 10 and constitutes the indentity card of the circuit.
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2. 2. - THE FUNCTION
“OR” A DIODES
The diagram of this circuit is represented on figure 11.
Exit VS is with state 1 when Ve1 OR Ve2, OR both are with state 1.
The tables of figure 12 represent, in different forms, the outputs according to the states of entry for the operator OR inclusive (because it includes the case where Ve1 and Ve2 are with state 1).
2. 3. - THE FUNCTION “NOT”
To form a complete logical system, it misses with these two preceding operators a third, which is the function NOT (or function reverser or logical complement).
We saw that the transistor, assembled out of common transmitter, allows this inversion (presence of tension VBE at the entry - absence of tension VCE at exit).
It is thus with the assembly of figure 13 that the function NOT is materialized. You will also find his truth table there.
If function NAND (NOT - AND), for example, must be fulfilled, it is necessary to join together the circuit AND with diodes, follow-up of the circuit NOT with transistor.
The following stage is very traced, it is enough to integrate the diodes and the transistor in the same case.
It is what one calls the D.T.L. (Diode Logic Transistor : logic with diode and transistor).
3. - SWITCHING FUNCTIONS A
DIODES AND TRANSISTORS “DTL”
3. 1. - FUNCTION “NAND”
Figure 14 indicates its material manufacture and its truth table. As you can note it, it is about the association of the circuit AND previously described (figure 8), followed by a reverser.
3. 2. - THE “NOR” FUNCTION
Figure 15 indicates its material manufacture and its truth table. One adds to the circuit OR of figure 11 a reverser.
However, such-which, these achievements present a defect of order which we will take into account as of now.
3. 3. - IMPROVEMENT OF THE ORDER
Figure 16 represents the association of an operator A with an operator B.
When the exit of operator A must be with state 0, in fact, it is not it completely because tension T1 is not a perfect switch and the exit is with tension VCE SAT (approximately 0,2 V). To this one comes to be added the direct tension of the diode : VD (approximately 0,6 V).
Tension VBE instead of being to 0 is with the potential :
VBE = VD + VCE SAT = 0,6 + 0,2 = 0,8 V.
This tension is definitely sufficient so that T2 leads, whereas it should be blocked.
You defer on figure 17. On the path of the current bases of T2, place a diode. The tension on its terminals VD', the tension V are equal to :
V = VD' + VBE
When the two operators are brought together and that the exit of A is to zero, we obtain :
V = VD' + VBE = VD + VCE SAT
We can draw :
VBE = VD + VCE SAT - VD'
while replacing by the values of tension:
VBE = 0,6 V + 0,2 V - 0,6 V = 0,2 V
This tension is not sufficient any more so that T2 leads and this one is blocked.
From now on, we will adopt this amendment for all operators DTL.
Figure 18 shows the preceding circuits while making these modifications.
In this figure, circuits NAND and NOR, followed by a reverser, or circuit NOT, make it possible to obtain the functions AND and OR which are materialized on figure 19 like their truth tables.
Certain manufacturers still carry out this technology. It, despite everything, is less and less used.
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