TEST YOUR KNOWLEDGE IN DIGITAL ELECTRONICS

Created it, 06/02/22

Last update it, 06/02/22

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Test 9     Test 10     Test 11     Test 12 

Test N° 9

1°) Y-a it a difference in procedure between the binary and decimal addition ?

2°) Which logical door provides the sum of two binary digits and which other provides reserve ?

3°) Comment called the summoner trained with a door OR Exclusive and a door AND ?

4°) How much entries has the complete summoner and which are they ?

5°) What the overflow ?

6°) With which type of adder does one obtain the highest computing speed ?

7°) Combien is it necessary to use integrated circuits standard 7485 to compare two numbers of 16 bits ?

8°) Of how much entries of selection has to lay out a multiplexer with 6 ways ?

Test N° 10

1°) Is the register with shift a memory ?

2°) Comment expressed the measurement of the storage capacity ?

3°) Which random access memory means ?

4°) Which abbreviation RAM means ?

5°) Which means ROM ?

6°) The ROM are they RAM ?

7°) What the address of one Byte ?

8°) How is indicated (symbol running) the terminal of writing and reading command in a memory ?

9°) Indicate the difference between static storage and dynamic storage.

10°) Which the difference in principle between static storage and dynamic storage ?

11°) Indicate two times characterizing the speed of a memory ?

12°) What cycle time ?

13°) Which volatile memory means ?

14°) Enumerate the principal types of memory of use in the numerical systems.

Test N° 11

1°) Which does one call “capacity of matrix” of a PLA? In which unit is expressed this capacity ?

2°) Is the following table of operation :

a) Write the equation for each function (F) in the form of mintermes.

b) Draw the diagram of establishment of these three functions in a PLA.

3°) Comment does one determine the maximum frequency of allowed clock for a numerical system ?

4°) Which the difference between the typical value and the minimal value for the maximum frequency of clock of a circuit ?

5°) Which called is CLOCK SKEW ?

6°) Comment can one connect exit TTL to entry CMOS on the following diagram ?

Test N° 12

1°) In a converter D / A with 4 bits, fed for a tension VR = 16 volts, which be the analogical tension of exit for a binary entry equalizes at 1011 ?

2°) For a converter D / A with 8 bits, which the maximum value of the output voltage VA if VR = 16 volts ?

3°) Which the principal characteristics of an operational amplifier ?

4°) Which amplification in tension AV of operational an amplifier assembly equipped with a resistance of R2 negative feedback = 100 kW (connected at exit and entry “-”) and with a resistance of R1 entry = 5kW ?

5°) Which is what the resolution of a converter D / A ?

6°) Which the factors affecting the precision of a converter D / A ?

7°) Combien does one need comparators to produce a parallel converter A / D 4 bits ?

8°) Which the principal advantage of a converter A / D parallel ?

9°) Which the maximum variation which will be able to treat a converter A / D 8 bits with successive approximations (VR = 10 Volts, time of conversion = 10 µs) ?

10°) Which the role of a circuit “Sample And Hold” ?

11°) Which the elements constituting a converter A / D with simple slope ?

12°) Pourquoi does one use converters A / D with double slope ?

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Daniel